The advancement of the integrated circuit, printed circuit board and other related technologies is advancing at a very rapid rate. The latest generation of integrated circuits can incorporate over more four times the amount of circuitry that was possible just a few years ago. Furthermore, circuit board and multi-chip module technology have allowed much denser circuit board designs. These and other developments have increased the development of increasingly complex and high-speed computer systems.
The design of such high-speed computer systems has become increasingly difficult and time consuming. In order to maximize performance and to minimize the size and power of such computer systems, designers often implement much of the hardware in a number of integrated circuits. The integrated circuits are often custom or semi-custom designed. Each of these custom integrated circuits may contain several hundred thousand gates, and each gate must be placed and routed in accordance with the overall computer system specification.
To design such a computer system, the designer typically produces an overall system specification using a hardware description language. VHDL and Verilog are the most common conventional hardware description languages. VHDL describes the behavior and structure of electrical systems, but is particularly suited as a language to describe the behavior and structure of digital electronic hardware designs, such as application specific intergrated circuits (ASICs) and field programmable gate arrays (FPGAs) as well as conventional digital circuits. Verilog is a textual format for describing electronic circuits and systems. Applied to electronic design, Verilog is intended to be used for system verification through simulation, for timing analysis, for test analysis (testability analysis and fault grading) and for logic synthesis.
As electronic hardware design becomes increasingly miniaturized, the tools of the designer must allow for more flexibility. The problem with conventional design languages like VHDL and Verilog is efficiently implementing hardware structures for computation. The conventional hardware design languages do not automate the micro-architectural designs needed.
The described approaches are not able to synthesize many different hardware implementations depending on the global context of the computation without having to change or annotate the original source.